Hydrogen management in plasma deposited films

ABSTRACT

Exemplary methods of semiconductor processing may include flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region, and the substrate may be maintained at a temperature below or about 450° C. The methods may include striking a plasma of the silicon-containing precursor. The methods may include forming a layer of amorphous silicon on a semiconductor substrate. The layer of amorphous silicon as-deposited may be characterized by less than or about 3% hydrogen incorporation.

CROSS REFERENCES TO RELATED APPLICATIONS

This application is a continuation of U.S. Non-Provisional patentapplication Ser. No. 16/932,793, filed Jul. 19, 2020, the contents ofwhich are hereby incorporated by reference in their entirety for allpurposes.

TECHNICAL FIELD

The present technology relates to methods and systems for semiconductorprocessing. More specifically, the present technology relates to systemsand methods for producing films with reduced hydrogen content.

BACKGROUND

Integrated circuits are made possible by processes which produceintricately patterned material layers on substrate surfaces. Producingpatterned material on a substrate requires controlled methods forforming and removing material. As device sizes continue to reduce, filmcharacteristics may lead to larger impacts on device performance.Materials used to form layers of materials may affect operationalcharacteristics of the devices produced. As material thicknessescontinue to reduce, as-deposited characteristics of the films may have agreater impact on device performance.

Thus, there is a need for improved systems and methods that can be usedto produce high quality devices and structures. These and other needsare addressed by the present technology.

SUMMARY

Exemplary methods of semiconductor processing may include flowing asilicon-containing precursor into a processing region of a semiconductorprocessing chamber. A substrate may be housed within the processingregion, and the substrate may be maintained at a temperature below orabout 450° C. The methods may include striking a plasma of thesilicon-containing precursor. The methods may include forming a layer ofamorphous silicon on a semiconductor substrate. The layer of amorphoussilicon may be characterized by less than or about 3% hydrogenincorporation.

In some embodiments, the methods may include flowing hydrogen into theprocessing region of the semiconductor processing chamber with thesilicon-containing precursor. The hydrogen may be flowed at a flow rateof at least twice the flow rate of the silicon-containing precursor. Themethods may include flowing a boron-containing precursor or aphosphorus-containing precursor into the processing region of thesemiconductor processing chamber with the silicon-containing precursor.The plasma may be pulsed at a frequency of less than or about 10 kHzduring the semiconductor processing method, and a duty cycle of plasmapulsing may be less than or about 50%. The methods may includeperforming an energy treatment on the layer of amorphous silicon. Theenergy treatment may further reduce the hydrogen incorporation. Theenergy treatment may include exposing the layer of amorphous silicon toUV, microwave, or in situ plasma. The energy treatment may be performedwithout breaking vacuum conditions during the semiconductor processingmethod.

Some embodiments of the present technology may encompass semiconductorprocessing methods. The methods may include flowing a silicon-containingprecursor into a processing region of a semiconductor processingchamber. A substrate may be housed within the processing region, and thesubstrate may be maintained at a temperature below or about 450° C. Themethods may include flowing a catalytic precursor into the processingregion of the semiconductor processing chamber. The methods may includestriking a plasma of the silicon-containing precursor and the catalyticprecursor. The methods may include forming a layer of amorphous siliconon a semiconductor substrate. The layer of amorphous silicon may becharacterized by less than or about 3% hydrogen incorporation.

In some embodiments, the catalytic precursor may include aboron-containing precursor, a phosphorus-containing precursor, or asilicon-and-halogen-containing precursor. The halogen may be or includefluorine, chlorine, or iodine. The plasma may be pulsed at a frequencyof less than or about 10 kHz during the semiconductor processing method.A duty cycle of plasma pulsing may be less than or about 50%. Themethods may include performing an energy treatment on the layer ofamorphous silicon. The energy treatment may further reduce the hydrogenincorporation. The energy treatment may include exposing the layer ofamorphous silicon to UV, microwave, or in situ plasma.

Some embodiments of the present technology may encompass semiconductorprocessing methods. The methods may include flowing a silicon-containingprecursor into a processing region of a semiconductor processingchamber. A substrate may be housed within the processing region. Thesubstrate may be maintained at a temperature below or about 450° C. Themethods may include striking a plasma of the silicon-containingprecursor. The methods may include forming a layer of amorphous siliconon a semiconductor substrate. The layer of amorphous silicon may becharacterized by a first amount of hydrogen incorporation. The methodsmay include performing an energy treatment on the layer of amorphoussilicon. The energy treatment may reduce an amount of hydrogen from thelayer of amorphous silicon to a second amount of hydrogen incorporationless than the first amount of hydrogen incorporation.

In some embodiments, the energy treatment may include exposing the layerof amorphous silicon to UV, microwave, or in situ plasma. The secondamount of hydrogen incorporation may be less than or about 2 at. %. Themethods may include flowing hydrogen into the processing region of thesemiconductor processing chamber with the silicon-containing precursor.The hydrogen may be flowed at a flow rate of at least twice the flowrate of the silicon-containing precursor. The plasma may be pulsed at afrequency of less than or about 10 kHz during the semiconductorprocessing method. A duty cycle of plasma pulsing may be less than orabout 50%.

Such technology may provide numerous benefits over conventional systemsand techniques. For example, embodiments of the present technology mayproduce films characterized by reduced hydrogen content. Additionally,the present technology may reduce hydrogen content without increasingfilm stress or porosity from hydrogen outgassing. These and otherembodiments, along with many of their advantages and features, aredescribed in more detail in conjunction with the below description andattached figures.

BRIEF DESCRIPTION OF THE DRAWINGS

A further understanding of the nature and advantages of the disclosedtechnology may be realized by reference to the remaining portions of thespecification and the drawings.

FIG. 1 shows a top view of an exemplary processing system according tosome embodiments of the present technology.

FIG. 2 shows a schematic cross-sectional view of an exemplary plasmadeposition system according to some embodiments of the presenttechnology.

FIG. 3 shows operations in a semiconductor processing method accordingto some embodiments of the present technology.

Several of the figures are included as schematics. It is to beunderstood that the figures are for illustrative purposes, and are notto be considered of scale unless specifically stated to be of scale.Additionally, as schematics, the figures are provided to aidcomprehension and may not include all aspects or information compared torealistic representations, and may include exaggerated material forillustrative purposes.

In the appended figures, similar components and/or features may have thesame reference label. Further, various components of the same type maybe distinguished by following the reference label by a letter thatdistinguishes among the similar components. If only the first referencelabel is used in the specification, the description is applicable to anyone of the similar components having the same first reference labelirrespective of the letter.

DETAILED DESCRIPTION

As semiconductor device sizes continue to reduce, the constituent filmsincluded within a structure may affect device performance, as well asfabrication of other materials being included in the device. Forexample, processes to form silicon-containing films may use silane orother silicon-containing materials. These precursors may includehydrogen that may be incorporated within the film. Incorporatinghydrogen into the film may cause additional issues during processing.For example, hydrogen incorporated in the film may be less thermallystable, and during later processing, outgassing may occur. Additionally,hydrogen may affect film stress, which may cause the film to becomeincreasingly compressive, and which can cause film delamination as well.Finally, volumes of hydrogen within the plasma may affect the depositionprocess, and may cause increased grain size and crystallinity of theformed film, which may challenge deposition processes intending to formamorphous silicon films.

To reduce or compensate for hydrogen incorporation, conventionaltechnologies may change deposition parameters, or may perform remedialactions. For example, when deposition is performed at highertemperatures, such as above or about 500° C., or above or about 600° C.,hydrogen may be released during the deposition, which may improve thefilm quality and characteristics. Additionally, conventionaltechnologies may perform an anneal subsequent to film deposition. Theanneal process may densify the film and allow hydrogen to be removedfrom the structure. Although these techniques may be effective duringsome fabrication operations, other processes may be limited by a thermalbudget.

For example, during thin-film transistor formation, or any number ofother processing operations, amorphous silicon may be formed on orwithin a device. In some of these devices, underlying materials orstructures may be incapable of withstanding temperatures associated withhigh-temperature deposition or anneals, and may be limited to processingtemperatures that are less than or about 550° C., less than or about500° C., less than or about 450° C., less than or about 400° C., orless. Conventional technologies may be limited to producing films havinghydrogen incorporation of up to 10 at. % or more. For thin-filmtransistor formation, increased hydrogen incorporation may impactmobility or performance of the transistor.

The present technology overcomes these issues by performing plasmadeposition processes where the as-deposited film may be characterized bya reduced hydrogen incorporation. By adjusting one or more processoperations or parameters, the present technology may produce amorphoussilicon films characterized by reduced hydrogen incorporation, and thefilms may be produced at reduced temperature. This may protectunderlying structures, which may be incapable of being exposed totemperatures of conventional techniques.

Although the remaining disclosure will routinely identify specificdeposition processes utilizing the disclosed technology, it will bereadily understood that the systems and methods are equally applicableto other deposition and etch processes as may occur in the describedchambers or any other chamber. Accordingly, the technology should not beconsidered to be so limited as for use with these specific depositionprocesses or chambers alone. The disclosure will discuss one possiblesystem and chamber that may be used in performing methods according tosome embodiments of the present technology before additional variationsand adjustments to this system according to embodiments of the presenttechnology are described.

FIG. 1 shows a top plan view of one embodiment of a processing system100 of deposition, etching, baking, and curing chambers according toembodiments. In the figure, a pair of front opening unified pods 102supply substrates of a variety of sizes that are received by roboticarms 104 and placed into a low pressure holding area 106 before beingplaced into one of the substrate processing chambers 108 a-f, positionedin tandem sections 109 a-c. A second robotic arm 110 may be used totransport the substrate wafers from the holding area 106 to thesubstrate processing chambers 108 a-f and back. Each substrateprocessing chamber 108 a-f, can be outfitted to perform a number ofsubstrate processing operations including formation of stacks ofsemiconductor materials described herein in addition to plasma-enhancedchemical vapor deposition, atomic layer deposition, physical vapordeposition, etch, pre-clean, degas, orientation, and other substrateprocesses including, annealing, ashing, etc.

The substrate processing chambers 108 a-f may include one or more systemcomponents for depositing, annealing, curing and/or etching a dielectricor other film on the substrate. In one configuration, two pairs of theprocessing chambers, e.g., 108 c-d and 108 e-f, may be used to depositdielectric material on the substrate, and the third pair of processingchambers, e.g., 108 a-b, may be used to etch the deposited dielectric.In another configuration, all three pairs of chambers, e.g., 108 a-f,may be configured to deposit stacks of alternating dielectric films onthe substrate. Any one or more of the processes described may be carriedout in chambers separated from the fabrication system shown in differentembodiments. It will be appreciated that additional configurations ofdeposition, etching, annealing, and curing chambers for dielectric filmsare contemplated by system 100.

FIG. 2 shows a schematic cross-sectional view of an exemplary plasmasystem 200 according to some embodiments of the present technology.Plasma system 200 may illustrate a pair of processing chambers 108 thatmay be fitted in one or more of tandem sections 109 described above, andwhich may include components or assemblies specifically configured toperform processes according to embodiments of the present technology.The plasma system 200 generally may include a chamber body 202 havingsidewalls 212, a bottom wall 216, and an interior sidewall 201 defininga pair of processing regions 220A and 220B. Each of the processingregions 220A-220B may be similarly configured, and may include identicalcomponents.

For example, processing region 220B, the components of which may also beincluded in processing region 220A, may include a pedestal 228 disposedin the processing region through a passage 222 formed in the bottom wall216 in the plasma system 200. The pedestal 228 may provide a heateradapted to support a substrate 229 on an exposed surface of thepedestal, such as a body portion. The pedestal 228 may include heatingelements 232, for example resistive heating elements, which may heat andcontrol the substrate temperature at a desired process temperature.Pedestal 228 may also be heated by a remote heating element, such as alamp assembly, or any other heating device.

The body of pedestal 228 may be coupled by a flange 233 to a stem 226.The stem 226 may electrically couple the pedestal 228 with a poweroutlet or power box 203. The power box 203 may include a drive systemthat controls the elevation and movement of the pedestal 228 within theprocessing region 220B. The stem 226 may also include electrical powerinterfaces to provide electrical power to the pedestal 228. The powerbox 203 may also include interfaces for electrical power and temperatureindicators, such as a thermocouple interface. The stem 226 may include abase assembly 238 adapted to detachably couple with the power box 203. Acircumferential ring 235 is shown above the power box 203. In someembodiments, the circumferential ring 235 may be a shoulder adapted as amechanical stop or land configured to provide a mechanical interfacebetween the base assembly 238 and the upper surface of the power box203.

A rod 230 may be included through a passage 224 formed in the bottomwall 216 of the processing region 220B and may be utilized to positionsubstrate lift pins 261 disposed through the body of pedestal 228. Thesubstrate lift pins 261 may selectively space the substrate 229 from thepedestal to facilitate exchange of the substrate 229 with a robotutilized for transferring the substrate 229 into and out of theprocessing region 220B through a substrate transfer port 260.

A chamber lid 204 may be coupled with a top portion of the chamber body202. The lid 204 may accommodate one or more precursor distributionsystems 208 coupled thereto. The precursor distribution system 208 mayinclude a precursor inlet passage 240 which may deliver reactant andcleaning precursors through a gas delivery assembly 218 into theprocessing region 220B. The gas delivery assembly 218 may include agasbox 248 having a blocker plate 244 disposed intermediate to afaceplate 246. A radio frequency (“RF”) source 265 may be coupled withthe gas delivery assembly 218, which may power the gas delivery assembly218 to facilitate generating a plasma region between the faceplate 246of the gas delivery assembly 218 and the pedestal 228, which may be theprocessing region of the chamber. In some embodiments, the RF source maybe coupled with other portions of the chamber body 202, such as thepedestal 228, to facilitate plasma generation. A dielectric isolator 258may be disposed between the lid 204 and the gas delivery assembly 218 toprevent conducting RF power to the lid 204. A shadow ring 206 may bedisposed on the periphery of the pedestal 228 that engages the pedestal228.

An optional cooling channel 247 may be formed in the gasbox 248 of thegas distribution system 208 to cool the gasbox 248 during operation. Aheat transfer fluid, such as water, ethylene glycol, a gas, or the like,may be circulated through the cooling channel 247 such that the gasbox248 may be maintained at a predefined temperature. A liner assembly 227may be disposed within the processing region 220B in close proximity tothe sidewalls 201, 212 of the chamber body 202 to prevent exposure ofthe sidewalls 201, 212 to the processing environment within theprocessing region 220B. The liner assembly 227 may include acircumferential pumping cavity 225, which may be coupled to a pumpingsystem 264 configured to exhaust gases and byproducts from theprocessing region 220B and control the pressure within the processingregion 220B. A plurality of exhaust ports 231 may be formed on the linerassembly 227. The exhaust ports 231 may be configured to allow the flowof gases from the processing region 220B to the circumferential pumpingcavity 225 in a manner that promotes processing within the system 200.

FIG. 3 shows exemplary operations in a processing method 300 accordingto some embodiments of the present technology. The method may beperformed in a variety of processing chambers, including plasma system200 described above. Method 300 may include one or more operations priorto the initiation of the stated method operations, including front endprocessing, deposition, etching, polishing, cleaning, or any otheroperations that may be performed prior to the described operations. Themethod may include a number of optional operations as denoted in thefigure, which may or may not specifically be associated with the methodaccording to the present technology. For example, many of the operationsare described in order to provide a broader scope of the semiconductorprocess, but are not critical to the technology, or may be performed byalternative methodology as will be discussed further below.

Method 300 may involve optional operations to develop the semiconductorstructure to a particular fabrication operation. Although in someembodiments method 300 may be performed on a base structure, in someembodiments the method may be performed subsequent other materialformation or removal. For example, any number of deposition, masking, orremoval operations may be performed to produce any transistor, memory,or other structural aspects on a substrate. In some embodiments one ormore structures formed on a substrate may be characterized by a thermalbudget of less than or about 500° C., less than or about 450° C., lessthan or about 400° C., or less. Accordingly, method 300 and anysubsequent operations may be performed at temperatures that are at orbelow the structural thermal budget. The substrate may be disposed on asubstrate support, which may be positioned within a processing region ofa semiconductor processing chamber. The operations to produce theunderlying structures may be performed in the same chamber in whichaspects of method 300 may be performed, and one or more operations mayalso be performed in one or more chambers on a similar platform as achamber in which operations of method 300 may be performed, or on otherplatforms.

In some embodiments, method 300 may include forming a layer of amorphoussilicon on a substrate. The methods may include flowing asilicon-containing precursor into a processing region where a substrateis housed at operation 305. The silicon-containing precursor may bedelivered with a carrier gas, including an inert precursor, such asargon or helium, for example. As will be explained in further detailbelow, in some embodiments an additional precursor may be flowed intothe processing region with the silicon-containing precursor at optionaloperation 310. At operation 315 a plasma may be struck of the precursorsflowed into the processing region, and a layer of amorphous silicon maybe deposited on the substrate at operation 320. The formation ordeposition may be performed using any number of precursors, such assilane or other silicon-containing materials, and in some embodiments asilicon-containing precursor delivered may also include hydrogen.Consequently, the deposited or formed layer of amorphous silicon may becharacterized by a first amount of hydrogen incorporation. Although theremaining disclosure will discuss amorphous silicon films, it is to beunderstood that the silicon films may include additional materials,which may produce doped amorphous silicon. For example, embodiments ofthe present technology may encompass silicon films which may be formedwith a dopant, such as phosphorous, boron, sulfur, arsenic, or othermaterials.

As noted previously, some embodiments of the present technology mayencompass films formed over materials or structures characterized by athermal budget less than or about 550° C., less than or about 500° C.,less than or about 450° C., less than or about 400° C., less than orabout 350° C., less than or about 300° C., or less. Accordingly, thelayer of amorphous silicon may be formed at or below any of thesetemperatures in some embodiments to accommodate the underlyingmaterials, and in some embodiments one or more operations, including alloperations of method 300, may be performed at or below any of thesetemperatures, and a substrate being processed may be maintained below orabout any of these temperatures throughout processing. Processingpressures during formation may be greater than or about 1 Torr in someembodiments, and may be between about 2 Ton and about 20 Torr. The filmmay also be formed with any silicon-containing material, such as silaneor other binary silicon-hydrogen compounds, as well as anysilicon-and-hydrogen-containing precursor. Consequently, the formedlayer may be characterized by a first amount of hydrogen incorporation.Because higher temperature deposition and anneals may not be feasiblefor some structures, without any other interactions as will be describedbelow, the hydrogen incorporation may be greater than or about 3 at. %,greater than or about 5 at. %, greater than or about 7 at. %, greaterthan or about 10 at. %, or more. This may cause any of the challengesdescribed previously, including stress effects and subsequentoutgassing. Accordingly, in some embodiments of the present technology,one or more modifications may be made to produce a film where theas-deposited film may be characterized by a hydrogen incorporation ofless than or about 3 at. % or less.

As noted at optional operation 310, in some embodiments one or moreadditional precursors may be delivered with the silicon-containingprecursors. For example, in some embodiments the methods may furtherinclude flowing hydrogen into the processing region of the semiconductorprocessing chamber with the silicon-containing precursor. Althoughcounterintuitive for a process intended to reduce hydrogen incorporationin a produced silicon film, the present technology surprisingly mayproduce such results with the addition of hydrogen in the processinggases.

When precursors are dissociated in a plasma, many of thesilicon-hydrogen bonds may be broken, although an amount of silicon andhydrogen bonding may still occur within the formed film, accounting forthe hydrogen incorporation of the final film. However, when anadditional amount of hydrogen is incorporated, the plasma willadditionally dissociate the hydrogen, such as from hydrogen gas, whichmay produce a number of hydrogen radicals and ions. Because theseparticles are small, they may easily penetrate the film being deposited.Additionally, these particles may be characterized by relatively highenergy, which may then be transferred into the film to break additionalsilicon and hydrogen bonds. The energy may also be sufficient to formhydrogen bonds with the hydrogen removed from silicon-hydrogen bonds,which may produce hydrogen gas. This newly formed hydrogen gas may flowfrom the film during the formation process itself, which may limitporosity or film degradation.

To produce the effect of reducing hydrogen within the film by addinghydrogen in the plasma precursors, the flow of hydrogen may be greaterthan the flow of the silicon-containing material. For example, in someembodiments the flow rate of the hydrogen compared to the flow rate ofthe silicon-containing precursor may be greater than or about 2:1, andmay be greater than or about 5:1, greater than or about 10:1, greaterthan or about 20:1, greater than or about 50:1, greater than or about75:1, greater than or about 100:1, or more. This may provide sufficienthydrogen radicals to permeate the film being deposited, break additionalsilicon-hydrogen bonds, and form hydrogen bonds which may remove thehydrogen from the film.

In some embodiments the additional precursor being delivered may be aprecursor configured to produce a catalytic reaction with thesilicon-containing precursor. Boron-containing precursors, phosphorouscontaining precursors, and some silicon-containing precursors mayprovide this catalytic effect. For example, borane, which may includediborane, phosphine, and silicon halides may interact with silane orhigher-order silanes to reduce the decomposition temperature of thesilanes, which may lower the energy barrier to break silicon-hydrogenbonds. This may further limit hydrogen incorporation in the film beingproduced. The silicon halides may include any number of halogen speciesincluding fluorine, chlorine, bromine, and iodine.

Adjusting the plasma formation process may also facilitate removal ofhydrogen from films being produced in some embodiments. For example,some embodiments of the present technology may include pulsing theplasma power during plasma generation. The plasma may be generated at aplasma-generation frequency, such as 13.56 MHz in one non-limitingexample. The plasma power may also be pulsed at a pulsing frequency thatmay be less than or about 10 kHz, and may be less than or about 9 kHz,less than or about 8 kHz, less than or about 7 kHz, less than or about 6kHz, less than or about 5 kHz, less than or about 4 kHz, less than orabout 3 kHz, less than or about 2 kHz, less than or about 1 kHz, orless. The duty cycle of the pulsing frequency may provide an amount of“off” time for the plasma generation.

During plasma “off” periods, deposition may not be occurring. Whilepreviously formed ions may quickly extinguish, radical species may stillcontact the heated substrate and transfer energy into the amorphouslattice being produced. This may continue to activate and breakadditional silicon-hydrogen bonds within the film, which may then beremoved from the film. At high duty cycle, insufficient time may beafforded for this effect before deposition resumes. Accordingly, in someembodiments, the duty cycle may be maintained at less than or about 50%,and may be maintained at less than or about 45%, less than or about 40%,less than or about 35%, less than or about 30%, less than or about 25%,less than or about 20%, less than or about 15%, less than or about 10%,less than or about 5%, or less. Any of these techniques, alone or incombination, may reduce hydrogen incorporation in the as-deposited filmto produce amorphous silicon films characterized by a hydrogenincorporation of less than or about 3 at. %, and may reduce hydrogenincorporation to less than or about 2.5 at. %, less than or about 2.4at. %, less than or about 2.3 at. %, less than or about 2.2 at. %, lessthan or about 2.1 at. %, less than or about 2.0 at. %, less than orabout 1.9 at. %, less than or about 1.8 at. %, less than or about 1.7at. %, less than or about 1.6 at. %, less than or about 1.5 at. %, lessthan or about 1.4 at. %, less than or about 1.3 at. %, less than orabout 1.2 at. %, less than or about 1.1 at. %, less than or about 1.0at. %, or less.

Subsequent film formation, in some embodiments the substrate on whichthe layer of amorphous silicon was formed may be further treated in apost-treatment process at optional operation 325, which may be anadditional energy treatment. The post treatment may be performed in thesame chamber as the deposition, or the substrate may be transferred froma first processing chamber to a second processing chamber. In someembodiments, the second chamber may be on the same tool, such aspreviously described, and the transfer may be performed whilemaintaining vacuum conditions for the substrate. The post-treatmentprocess may be configured to further reduce hydrogen incorporation inthe film produced by transferring additional energy into the depositedfilm, and break additional silicon-hydrogen bonds. This may furtherreduce an amount of hydrogen incorporation within the layer from a firstamount during deposition to a second amount of hydrogen incorporation,which may be less than the first amount of hydrogen incorporation. Thesecond amount of hydrogen incorporation may less than or about 2 at. %,and may be less than or about 1.5 at. %, less than or about 1.0 at. %,less than or about 0.5 at. % or less.

The post treatment may include any number of processes configured toprovide additional energy transfer, while maintaining the thermalbudget. Accordingly, a thermal anneal may not be performed in someembodiments, and post-treatment processes may be performed at any of thetemperatures as previously stated. Post-treatment processes may includeUV exposure, microwave exposure, or in situ plasma exposure. Forexample, UV exposure may be performed while maintaining the temperaturebelow or about 450° C., or less, and the exposure may be performed forgreater than or about 5 minutes, greater than or about 10 minutes,greater than or about 15 minutes, greater than or about 20 minutes,greater than or about 25 minutes, greater than or about 30 minutes, ormore. Similarly a microwave anneal may be performed at similartemperatures for greater than or about 1 minute, greater than or about 2minutes, greater than or about 5 minutes, greater than or about 10minutes, or more.

Subsequent formation, flow of the silicon-containing precursor may behalted, and a post-treatment plasma exposure may be performed withhydrogen or an inert gas, such as helium or argon. The plasma may beformed at low power to limit sputtering of the film produced, and insome embodiments the post-treatment plasma may be formed at less than orabout 2,500 W, and may be formed at less than or about 2,000 W, lessthan or about 1,500 W, less than or about 1,000 W, less than or about500 W, or less. To limit formation of pores within the film during thetreatment, method 300 may be cycled to incorporate the treatment atintermediate periods during the film formation. For example, in someembodiments the film may be formed in at least two operations, whereeach operation may form less than or about 50% of a total thickness ofthe film, and may form less than or about 30%, less than or about 25%,less than or about 20%, or less. In between formation cycles, a posttreatment may be performed to remove additional hydrogen from theportion of the film formed. To limit reductions in queue time, plasmatreatments may be performed within the deposition chamber, and otherenergy treatments may be performed in a chamber on the same tool as thedeposition chamber. By utilizing one or more aspects of the presenttechnology, hydrogen incorporation within a film may be reduced comparedto conventional technologies. Additionally, the processes described maybe performed at lower temperatures than many conventional techniques,which may accommodate structures that may be constrained by a thermalbudget.

In the preceding description, for the purposes of explanation, numerousdetails have been set forth in order to provide an understanding ofvarious embodiments of the present technology. It will be apparent toone skilled in the art, however, that certain embodiments may bepracticed without some of these details, or with additional details.

Having disclosed several embodiments, it will be recognized by those ofskill in the art that various modifications, alternative constructions,and equivalents may be used without departing from the spirit of theembodiments. Additionally, a number of well-known processes and elementshave not been described in order to avoid unnecessarily obscuring thepresent technology. Accordingly, the above description should not betaken as limiting the scope of the technology.

Where a range of values is provided, it is understood that eachintervening value, to the smallest fraction of the unit of the lowerlimit, unless the context clearly dictates otherwise, between the upperand lower limits of that range is also specifically disclosed. Anynarrower range between any stated values or unstated intervening valuesin a stated range and any other stated or intervening value in thatstated range is encompassed. The upper and lower limits of those smallerranges may independently be included or excluded in the range, and eachrange where either, neither, or both limits are included in the smallerranges is also encompassed within the technology, subject to anyspecifically excluded limit in the stated range. Where the stated rangeincludes one or both of the limits, ranges excluding either or both ofthose included limits are also included.

As used herein and in the appended claims, the singular forms “a”, “an”,and “the” include plural references unless the context clearly dictatesotherwise. Thus, for example, reference to “a precursor” includes aplurality of such precursors, and reference to “the layer” includesreference to one or more layers and equivalents thereof known to thoseskilled in the art, and so forth.

Also, the words “comprise(s)”, “comprising”, “contain(s)”, “containing”,“include(s)”, and “including”, when used in this specification and inthe following claims, are intended to specify the presence of statedfeatures, integers, components, or operations, but they do not precludethe presence or addition of one or more other features, integers,components, operations, acts, or groups.

1. A semiconductor processing method comprising: flowing asilicon-containing precursor into a processing region of a semiconductorprocessing chamber, wherein a substrate is housed within the processingregion, and wherein the substrate is maintained at a temperature belowor about 450° C.; striking a plasma of the silicon-containing precursor;and forming a layer of amorphous silicon on a semiconductor substrate,wherein the layer of amorphous silicon as-deposited is characterized byless than or about 3% hydrogen incorporation.
 2. The semiconductorprocessing method of claim 1, further comprising: flowing hydrogen intothe processing region of the semiconductor processing chamber with thesilicon-containing precursor.
 3. The semiconductor processing method ofclaim 2, wherein the hydrogen is flowed at a flow rate of at least twicethe flow rate of the silicon-containing precursor.
 4. The semiconductorprocessing method of claim 1, further comprising: flowing aboron-containing precursor or a phosphorus-containing precursor into theprocessing region of the semiconductor processing chamber with thesilicon-containing precursor.
 5. The semiconductor processing method ofclaim 1, wherein the plasma is pulsed at a frequency of less than orabout 10 kHz during the semiconductor processing method, and wherein aduty cycle of plasma pulsing is less than or about 50%.
 6. Thesemiconductor processing method of claim 1, further comprising:performing an energy treatment on the layer of amorphous silicon,wherein the energy treatment further reduces the hydrogen incorporation.7. The semiconductor processing method of claim 6, wherein the energytreatment comprises exposing the layer of amorphous silicon to UV,microwave, or in situ plasma.
 8. The semiconductor processing method ofclaim 6, wherein the energy treatment is performed without breakingvacuum conditions during the semiconductor processing method.
 9. Asemiconductor processing method comprising: flowing a silicon-containingprecursor into a processing region of a semiconductor processingchamber, wherein a substrate is housed within the processing region, andwherein the substrate is maintained at a temperature below or about 450°C.; flowing a catalytic precursor into the processing region of thesemiconductor processing chamber; striking a plasma of thesilicon-containing precursor and the catalytic precursor; and forming alayer of amorphous silicon on a semiconductor substrate, wherein thelayer of amorphous silicon as-deposited is characterized by less than orabout 3% hydrogen incorporation.
 10. The semiconductor processing methodof claim 9, wherein the catalytic precursor comprises a boron-containingprecursor, a phosphorus-containing precursor, or asilicon-and-halogen-containing precursor.
 11. The semiconductorprocessing method of claim 10, wherein the halogen comprises fluorine,chlorine, or iodine.
 12. The semiconductor processing method of claim 9,wherein the plasma is pulsed at a frequency of less than or about 10 kHzduring the semiconductor processing method, and wherein a duty cycle ofplasma pulsing is less than or about 50%.
 13. The semiconductorprocessing method of claim 9, further comprising: performing an energytreatment on the layer of amorphous silicon, wherein the energytreatment further reduces the hydrogen incorporation.
 14. Thesemiconductor processing method of claim 13, wherein the energytreatment comprises exposing the layer of amorphous silicon to UV,microwave, or in situ plasma.
 15. A semiconductor processing methodcomprising: flowing a silicon-containing precursor into a processingregion of a semiconductor processing chamber, wherein a substrate ishoused within the processing region, and wherein the substrate ismaintained at a temperature below or about 450° C.; striking a plasma ofthe silicon-containing precursor; forming a layer of amorphous siliconon a semiconductor substrate, wherein the layer of amorphous siliconas-deposited is characterized by a first amount of hydrogenincorporation of less than or about 3 at. %; and performing an energytreatment on the layer of amorphous silicon, wherein the energytreatment reduces an amount of hydrogen from the layer of amorphoussilicon to a second amount of hydrogen incorporation less than the firstamount of hydrogen incorporation.
 16. The semiconductor processingmethod of claim 15, wherein the energy treatment comprises exposing thelayer of amorphous silicon to UV, microwave, or in situ plasma.
 17. Thesemiconductor processing method of claim 15, wherein the energytreatment comprises exposing the amorphous silicon to in situ plasma,and wherein the in situ plasma is formed at less than or about 2,000 W.18. The semiconductor processing method of claim 15, wherein the secondamount of hydrogen incorporation is less than or about 2 at. %.
 19. Thesemiconductor processing method of claim 15, further comprising: flowinghydrogen into the processing region of the semiconductor processingchamber with the silicon-containing precursor.
 20. The semiconductorprocessing method of claim 15, wherein the plasma is pulsed at afrequency of less than or about 10 kHz during the semiconductorprocessing method, and wherein a duty cycle of plasma pulsing is lessthan or about 50%.